Taking advantage of graphene to build the next generation of processor architectures
Computers nowadays are limited by the speed at which its internal components communicate. As a result, there is a lot of research devoted to creating faster, more efficient, and more versatile interconnects capable of sustaining advanced computer architectures.
The EU-funded project WiPLASH works exactly in this direction, aiming at providing solid experimental foundations of the key enablers of on-chip wireless communication at the functional unit level as well as their technological and architectural integration. Indeed, the project, that has recently published a preprint called “Graphene-based Wireless Agile Interconnects for Massive Heterogeneous Multi-chip Processors” available in Arxiv. The paper describes the overall mission of the project: to exploit the unique properties of graphene nano-antennas to build, for the first time, agile wireless interconnects enabling the next generation of processor architectures.
The project will prove that this approach can accelerate AI processing by at least 10X, therefore anticipating a tremendous impact on the design of processors within drones, cars, cellphones, laptops, or in data centers.
More information about WiPLASH
FET-Open and FET Proactive are now part of the Enhanced European Innovation Council (EIC) Pilot (specifically the Pathfinder), the new home for deep-tech research and innovation in Horizon 2020, the EU funding programme for research and innovation
Photo by CHUTTERSNAP on Unsplash
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